To get the truth table shown, from the following logic circuit, the Gate $\mathrm{G}$ should be $…

To get the truth table shown, from the following logic circuit, the Gate $\mathrm{G}$ should be $ \begin{array}{|c|c|c|} \hline \mathrm{A} & \mathrm{B} & \mathrm{Y} \\ \hline 0 & 0 & 0 \\ \hline 0 & 1 & 0 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array}$

1. OR
2. AND
3. NOR
4. NAND

Solution

Truth table for $\mathrm{Y}$, with the possible values of $\mathrm{C}$ is, $ \begin{array}{|c|c|c|} \hline \mathbf{A} & \mathbf{C} & \mathbf{Y} \\ \hline 0 & 0 & 0 \\ \hline 0 & 0 & 0 \\ \hline 1 & 0,1 & 1 \\ \hline 1 & 0,1 & 1 \\ \hline \end{array}$ For gate $\mathrm{G}$ $ \begin{array}{|c|c|c|c|} \hline & A & B & C \\ \hline (I) & 0 & 0 & 0 \\ \hline (II) & 0 & 1 & 0 \\ \hline (III) & 1 & 0 & 0,1 \\ \hline (IV) & 1 & 1 & 0,1 \\ \hline \end{array}$ $\mathrm{G}$ is not a NOT gate as NOT gate takes only one input. (II) indicates $\mathrm{G}$ is not a OR gate as OR gate would give high output for the inputs in (II). Also, (II) indicates it is not a XOR gate as XOR would also give high output for inputs in (II). Hence, the given truth table is satisfied only by AND gate.

Asked in: MHT CET 2023 (09 May Shift 1)

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