The waveforms $A$ and $B$ given below are given as input to a NAND gate. Then its logic output $Y$ is

The waveforms $A$ and $B$ given below are given as input to a NAND gate. Then its logic output $Y$ is
  1. for $t_1$ to $t_2 ; Y=0$
  2. for $t_2$ to $t_3 ; Y=1$
  3. for $t_3$ to $t_4 ; Y=1$
  4. for $t_4$ to $t_5 ; Y=0$

Solution

A NAND gate is made by connecting a NOT gate and a AND gate with each other. The symbol for NAND gate is given as

The Boolean expression for a NAND gate is given as
\(Y=\overline{A \cdot B}=\bar{A}+\bar{B}\)
Truth Table for a NAND gate is given as
\(\begin{array}{|c|c|c|}
\hline \text { Input A } & \text { Input B } & \text { Output Y } \\
\hline 0 & 0 & 1 \\
\hline 0 & 1 & 1 \\
\hline 1 & 0 & 1 \\
\hline 1 & 1 & 0 \\
\hline
\end{array}\)
For \(t_1\) to \(t_2\); we have \(\mathrm{A}=1\) and \(\mathrm{B}=0\), using the Boolean algebra or the truth table for NAND gate we get \(\mathrm{y}=1\)
For \(t_2\) to \(t_3\); we have \(\mathrm{A}=1\) and \(\mathrm{B}=1\), using the Boolean algebra or the truth table for NAND gate we get \(\mathrm{y}=0\)
For \(t_3\) to \(t_4\); we have \(\mathrm{A}=0\) and \(\mathrm{B}=1\), using the Boolean algebra or the truth table for NAND gate we get \(\mathrm{y}=1\)
For \(t_4\) to \(t_5\); we have \(\mathrm{A}=0\) and \(\mathrm{B}=0\), using the Boolean algebra or the truth table for NAND gate we get \(\mathrm{y}=1\)
For \(t_5\) to \(t_6\); we have \(\mathrm{A}=1\) and \(\mathrm{B}=0\), using the Boolean algebra or the truth table for NAND gate we get \(\mathrm{y}=1\)
On the basis of the above results, the correct option is C from the given choices.

Asked in: NEET 2022 (Phase 2)

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