The gate described is an OR gate, whose output is 'one' when either or both inputs are 'one'. Its truth table is:
\begin{tabular}{|l|l|l|}
\hline Input A & Input B & Output \\
\hline 0 & 0 & 0 \\
\hline 0 & 1 & 1 \\
\hline 1 & 0 & 1 \\
\hline 1 & 1 & 1 \\
\hline
\end{tabular}