
The circuit is equivalent to

- AND gate
- NAND gate
- NOR gate
- OR gate
Solution

Output of NOR gate,
$Y_1=\overline{A+B}$
Output of NAND gate,
$\begin{aligned}
Y_2 & =\overline{Y_1 \cdot Y_1} \\
& =\overline{\overline{A+B} \cdot \overline{A+B}} \\
& =\overline{\overline{A+B}}+\overline{\overline{A+B}} \\
& =(A+B)+(A+B) \\
& =A+B
\end{aligned}$
Output of NOT gate,
$\begin{aligned}
Y & =\overline{Y_2} \\
& =\overline{A+B}
\end{aligned}$
which is the output of NOR gate.
Alternative :

Same as NOR Gate
NOR Gate
$\begin{array}{lll}0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 0\end{array}$
Asked in: NEET 2008 (Screening)