The truth table for this given circuit is:

With respect to the above diagram, the final output can be calculated as follows:

$$\begin{gathered} \mathrm{Y}=\mathrm{A}·\mathrm{B}+\overline{\mathrm{A}}·\mathrm{B} \\ =(\mathrm{A}+\overline{\mathrm{A}})·\mathrm{B} \\ \Rightarrow \mathrm{Y}=1.\mathrm{B} \\ \Rightarrow \mathrm{Y}=\mathrm{B} \end{gathered}$$

Hence, the required truth table can be written as follows: